Since the 1st of April 2010, I hold the chair for Integrated Digital Systems at the University of Bremen. As full professor, my responsibilities cover all the aspects of research and teaching in this subject.
+49 421218 62533 agarcia (at) item.uni-bremen.de
I am the person to contact for administrative and organisational issues. Being the contact point for the IDS, I support Prof. García-Ortiz and his team regarding staff-related queries as well as project-related topics.
+49 421218 62534 janssen (at) item.uni-bremen.de
My research focuses on the following topics:
+49 421218 62523 wyu (at) item.uni-bremen.de
My research is directed towards the advancement of dependability enhancement techniques and tools, currently spanning the topics of low-power single event effect mitigation as well as error detection and failure prediction for graceful degrading multiprocessor systems.
+49 (0) 421 218 62524 rschmidt (at) item.uni-bremen.de
My research focuses on power reduction techniques in nanometric interconnects using stochastic approaches.
+49 421218 62517 amir.najafi (at) item.uni-bremen.de
My research focuses on power reduction techniques in processing architectures using stochastic approaches.
+49 421218 62518 ardalan (at) item.uni-bremen.de
My main responsibilities are:
+49 421218 62512 kleditsch (at) item.uni-bremen.de
My main responsibility is the development, organization and operation of ITEM's IT infrastructure. I am supporting the groups and students on the topics of IT systems and computer technology.
+49 421218 62526 peeper (at) item.uni-bremen.de
I contribute to the development, organization and operation of ITEM's IT infrastructure. I am supporting the groups and students on topics of hardware a and the use of existing software application.
+49 421218 62510 lutzen (at) item.uni-bremen.de
My research focuses on the following topics:
+49 421218 62519 yanqiu (at) item.uni-bremen.de
I am now working on machine learning architectures and SoCs at GML Eindhoven but am still cooperating with the University of Bremen and the Georgia Tech (Atlanta, USA) on 3D-IC design.
bamberg (at) uni-bremen.de
We have numerous collaborations with national and international research groups, as for example:
As part of our commitment with the dissemination of scientific results and the collaboration with other institutions, IDS has been actively involved in the organization of several major conferences and workshops. Among them, we have organized PATMOS, VARI and RECOSOC , where Prof. A. Garcia-Ortiz was general chair. He also served as general chair of the TOP2 of EOSAM in 2012.
The PATMOS 2016 objective is to provide a forum to discuss and investigate emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems, including reconfigurable hardware such as FPGAs. The technical program focuses on timing, performance and power consumption as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization.
VARI 2016, collocated with PATMOS, is the 7th European Workshop on CMOS Variability. The increasing variability in CMOS transistor characteristics, as well as its sensitivity to environmental variations has become a major challenge to scaling and integration. This leads to major changes in the way that future integrated circuits and systems are designed. S
Over the past decade ReCoSoC has established itself as a international reference event for research in the areas of reconfigurable and communication-centric systems-on-chip. Its informal and dynamic philosophy encourages technical and scientific interactions of both academic and industrial participants through presentations and special sessions reporting latest advances in the related areas.
Novel developments and applications in the field of silicon photonics and related areas, ranging from optical interconnects to sensing applications will revolutionize conventional microelectronics. Potential topics include, but are not limited to the design, simulation, modeling and fabrication of optical inter-connects (board to board, chip to chip or on chip), e.g. active optical cables (AOCs), optical on chip routing architectures, clock distribution and technologies as well as related design concepts for high speed, low power photonic integrated circuits (PICs). Also (CMOS-compatible) optical sources and detectors and the optimization of light emission and absorption for data processing using materials such as SiGe or III/Vs etc. will be discussed.